The Future of HPC through Driving Challenges and Enabling Opportunities
Keynote by Thomas Sterling, Indiana University
Center for Research in Extreme Scale Technologies
School of Informatics and Computing
It has emerged as a litany of concerns: the end of Moore’s Law, the end of Dennard scaling, the flat-lining of clock rates, power efficiency, parallelism and scalability, reliability, user productivity, and performance portability. Encapsulating all of these is the international quest to achieve Exascale computing by some definable metrics many does colloquium count for writing skills coursework fgcu years and more than an order of magnitude before such a usable accomplishment paper writer is likely to be realized. Yet, no clear safe path is charted with conflicting view of what constitutes risk-adverse (and presumably responsible). Is it born out by incremental changes to conventional practices or does it demand innovative and potentially disruptive solutions to problems plaguing the foundations and principles of high end computing systems. This presentation will describe key leading edge accomplishments in the field of HPC with some results less than a week old and discuss certain directions that are forcing changes away from conventional HPC architectures and methodologies. TiahuLight, Knights Landing, and emerging runtime systems are among the innovations now and in the future that will be considered. In so doing,
HPC as a field will be exposed as entering the most exciting period of change and exploration since the 1980’s in terms of form and application impact. Questions will be welcomes from the audience throughout the presentation.
Dr. Thomas Sterling holds the position of Professor of Informatics and Computing at the Indiana University (IU) School of Informatics and Computing Department of Intelligent Systems Engineering (ISE) as well as serves as Director of the IU Center for Research in Extreme Scale Technologies (CREST). Since receiving his Ph.D from MIT in 1984 as a Hertz Fellow, Dr. Sterling has engaged in applied research in parallel computing system structures, semantics, and operation in industry, government labs, and academia. Dr. Sterling is best known as the “father of Beowulf” for his pioneering research in commodity/Linux cluster computing for which he shared the Gordon Bell Prize in 1997. He led the HTMT Project sponsored by multiple agencies to explore advanced technologies and their implication for high-end computer system architectures. Other research projects in which he contributed included the DARPA DIVA PIM architecture project with USC-ISI, the DARPA HPCS program sponsored Cray-led Cascade Petaflops architecture, and the Gilgamesh high-density computing project at NASA JPL. Sterling is currently involved in research associated with the innovative ParalleX execution model for extreme scale computing informative paper ideas to establish the foundation principles guiding the development of future generation Exascale computing systems. ParalleX is currently the conceptual centerpiece of the XPRESS project as part of the DOE X-stack program and has been demonstrated via the proof-of-concept HPX-5 runtime system software. Dr. Sterling is the co-author of six books and holds six patents. He was the recipient of the 2013 Vanguard Award and is a Fellow of the AAAS. He is also co-guest editor with Bill Gropp of the HPCwire Exascale Edition.